1. Field of the Invention
The present invention relates to a package for a semiconductor chip and a method of forming the same.
2. Description of the Related Art
Semiconductors are materials that have characteristics of insulators and conductors. In today's technology, semiconductor materials have become extremely important as the basis for transistors, diodes, and other solid-state devices. Semiconductors are usually made from germanium or silicon, but selenium and copper oxide, as well as other materials are also used. When properly made, semiconductors will conduct electricity in one direction better than they will in the other direction.
Currently, emerging electronic product applications create a set of challenges for the IC packaging industry. Once the IC chips have been produced and encapsulated in semiconductor packages, they may be used in a wide variety of electronic appliances. The variety of the electronic devices which incorporate semiconductor packages has grown dramatically in recent years and includes cellular phones, portable computers, hand-held devices, and many others. Each of these devices typically includes a motherboard on which a number of semiconductor packages are secured to provide multiple electronic functions. As consumer demand increases, the size of these devices decreases and the cost is reduced. Therefore, it is increasingly desirable to reduce the profile of the integrated semiconductor packages so that the resultant electronic systems can be incorporated into more compact devices and products.
Recently, multi-chip packaging, which is a special field of IC packaging that relates to the assembly of multiple semiconductor chips within a single IC package entity, has become increasingly popular. This popularity is driven by an industry demand to package more functional silicon content into a smaller package at a lower cost. Packaging two or more silicon chips within a single package reduces the related cost and also reduces the area required on the printed circuit boards, on which the IC package is mounted. In addition, multi chip packaging enables close proximity of chips resulting in shorter electronic signal paths between chips in the package. This reduces electronic signal travel time and improves overall speed and performance. Further, multi-chip packages save considerable mounting area, thus increasing valuable layout flexibility.
Multi-chip packages, in combination with BGA technology, are viewed as part of the solution for the widening gap between silicon I/O density and performance and the material capabilities of the package and board/substrate structure. Multi-chip packages can be viewed as standard single-chip packages modified to accommodate both multiple chips and passive components in order to provide the user with higher functionality integration. Typically, most multi-chip packages incorporate between two and six chips and are packaged in a conventional BGA.
The advantages of multi-chip packaging are numerous. For example, it allows for greater functionality in a time-to-market window that cannot be met through silicon integration. Effective use of multi-chip packages yields increased density and performance and reduced size and weight at the board or system level, while also reducing board area and routing complexity. Often, board layer reduction offsets the additional costs of using multi-chip packages. Additional benefits of multi chip packaging include design optimization through use of the most cost-effective silicon solutions and the ability to assemble packages utilizing different semiconductor technologies, die geometries, or types of chips in the same package.
This special field of IC packaging increases the value of high-speed designs, assembly processes and materials incorporated into a multi-chip package. Packaging chips together in this manner also facilitates the process of assembling stacked die or multi level, two-sided packages. The incorporation of different interconnection technologies, such as flip-chip or wire bond, into the multi-chip package is easily accommodated using this technology.
Therefore, improved multi-chip package designs and more economical and efficient methods of producing such packages are desired.